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  Resource Audit
  Implementation Audit
  Product roadmap versus ROI analysis
 Cost reduction


  Process Standardization 
   Design Environment Setup
   Architecture Layout
   Design Entry & Change Management
   Integrated Verification
   Strategic EDA deployment

  
   
  Scalable Infrastructure: 50 to 500+ engineers
  Ease of setup and management
  - Remote tracking through CPAS™
  - Local Customer Service
  Standardized, Proven Processes
  - Utilizes the same Fiesta® Toolkit
    for process acceleration deployed
    at Comit Silicon Valley Center
  Offshore services provide Better ROI

   
   Full-service vendor neutral
   Contract Engineering
   Center in the Silicon Valley


   
   Chip, board, software
   and system design
   under one roof

   Knowledgeable Teams
  
   Advanced Online Project
   Management and tracking
   through CPAS™  

 
   Design, Integration and
   Project Management Services for:


   ARM®  MIPS® IBM® PowerPC™
   VLIW / DSP Processors
   Xilinx Virtex™-II-Pro (FPGA)
   Embedded OSs
   Embedded SW development
   SoC Verification tools

  
  Multiple Verification Strategies:
  - Comit Fiesta® CVXT
  - Specman Elite™
  - OpenVera™
  Formal Verification

   
   Hi-speed Digital
   Mixed Signal
   Board Bringup

  
   Multi-million gate
   Multiple clock domains
   Upto 0.13 micron taped out   
   DSP
   PCI USB
   Infiniband
   IEEE 1394 IEEE 1394b
   Gigabit Ethernet 10/100 Ethernet
   SONET OC48 OC192
   ATM ISDN UTOPIA
   XDSL VoIP HPNA DOCSIS
   IEEE 802.11a IEEE 802.11b
   Bluetooth HiperLAN

  
   Agere Xilinx Actel Atmel
   QuickLogic Lattice Altera
   Embedded Processor FPGA
 
  
   Hardware - Software Co-Design 
   OS Internals Device drivers
   Windows™ Linux Solaris™
   Win CE™ Palm OS™
   Embedded Linux  VxWorks™  pSOS™
   Protocol stacks
   System diagnostics
   System, Device & bus models
   XML Java

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SAMPLE BOARD DESIGNS

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