Prof. Marteean's Technotes are a
test of skill for the best engineers. Professor's questions appear in
Comit's newsletter Design
Advantage, starting with the Quarter 3, 2002 issue.
Current
Question:
What
does this piece of Verilog code do? Can you make it shorter?
integer i;
wire
[31:0] din;
reg [31:0] dout;
always
@(din)
begin
dout[31] <= din[31];
for (i = 0; i < 31; i = i + 1)
begin
dout[i] <= din[i+1] ^ din[i];
end