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Design Advantage
Current Issue
Introducing FiestaŽ, New Alliances and Prof. Marteean's Technotes.... News on 0.13 micron SoC tapeout
Comit recently taped out a multi-million gate SoC to TSMC 0.13 micron process. The design included an embedded processor core and 17 clock domains, with some of the internal logic running at upwards of 620MHz. Comit implemented the design jointly with the customer and alliance partner eSilicon, to deliver a DRC-clean GDSII. >>more (pdf)
Volume:5 No 1- Jan-Feb 2002(pdf)
- Dealing with on chip memories and AHB
Volume:5 No 2- Mar-Apr 2002(pdf)
- High Frequency Board Layout & Design in Multiprocessor Environments
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