Management
Venkat Iyer, President, CEO
Venkat joined Comit so soon after its inception, that he can be called
virtually a co-founder. Starting as a software engineer in 1992, he
took over as CEO of Comit in February 2009.
He was VP Engineering from 2003 onwards. Earlier he had held several
technical management positions including Sr. Director/Director
Engineering (1998-2002), Country Manager, Japan (1996-1998) and Manager SW
Engineering.
Venkat can be called a co-founder not only in terms of his long tenure
in Comit, but also in the sense that he has been responsible for
building Comit's engineering expertise over the years. With an immense
breadth and depth of knowledge in system design, hardware design,
software development, process standardization, acceleration and
automation, Venkat is the ultimate engineer's engineer and a hands-on
manager.
His expertise ranges from leading a multi-million gate SoC design
team, to software development in assembly for tiny microcontrollers,
to state-of-the art object-oriented languages including Java, embedded
systems, language systems and EDA tools. Venkat is the architect of
Comit's FIESTA®
Process Standardization and Acceleration Toolkit.
Venkat holds a degree of Master of Technology in Computer Science from
Pune University in India. His work interests are Logic Design, Tcl,
Languages and Automation. He has contributed to many open source
projects and enjoys basketball, snowboarding, playing the guitar, and
hiking.
Prashant Joshi, Vice President Engineering
Elevated to VP Engineering from March 2009, Prashant joined Comit in
April 2000 as Senior Hardware Engineer. He quickly rose to become
Project Manager, and later Director of Engineering.
In his 9+ years in Comit , Prashant has worked on and delivered many
working chips for our customers. His expertise covers many areas
including ASIC Design, Verification, Test development, high speed board
design, and analog design, and many technologies such as Networking,
Communication, Digital video, Cryptography and Medical electronics, both
as a hands-on engineer and in engineering management positions.
Prashant holds an M.Tech. in Electronics Design and Technology (1998)
from the Indian Institute of Science, Bangalore, India.
Anjana Iyer, Manager Software Engineering
In Comit since 1993, Anjana brings a wealth of software engineering
expertise.
She possesses in depth knowledge of all flavors of Unix including
Linux, all flavors of Windows, and many Real Time Operating
Systems. Virtually every SW project that Comit worked on or software
product that Comit developed over the years has had her significant
contribution, whether it be writing device drivers, software-based
verification including writing of hardware models or developing EDA
tools from scratch like Comit's
FIESTA® Process Standardization and Acceleration
Toolkit.
Anjana holds a Master's Degree in Computer Applications (MCA) from
University of Pune (1992).
Durairaj 'Raj' Prabakaran, Manager Systems Engineering
Joining Comit in 1997 as a hardware engineer, Raj has successfully
delivered tens of FPGA designs (Actel, Altera, Xilinx and others), and
have them working on customer boards or Comit designed boards.
Raj rose quickly to become Technical Lead, Project Manager, and Manager
Systems Engineering from March 2009.
Almost all of Comit's system and board level projects have had his
significant contributions as design engineer or project manager,
including managing the details of BOMP selection, sourcing, layout,
vendor management, and successful delivery to manufacture.
His expertise ranges from RTL coding for an FPGA or ASIC to designing
and debugging systems, and boards in the lab, working with software
engineers and constantly striving to deliver working solutions to our
customers.
Raj holds a Bachelors in Electronics and Communication Engineering
(1993) from, Madurai Kamaraj University, Tamil Nadu, India.
Bijeet Sharma, Manager ASIC development
Joining Comit in 1998 as a hardware engineer, Bijeet has successfully
delivered a number of FPGA designs (Actel, Altera, Xilinx and others),
and worked on and delivered many working chips for our customers.
Bijeet rose quickly to become Technical Lead, Project Manager, and
Manager ASIC development from March 2009.
His technical abilities include Chip level Architecture design,
Specification development, Logic design, RTL coding, Verification and
Synthesis for SoCs using Tensilica, Trimedia, or ARM7/ARM9 processors
over on chip buses such as AMBA AHB, ASB, APB, Intel bus, PCI etc.
Bijeet holds an M.S. in Applied Electronics (1996) from University of
Pune, India.
Abhijeet Samudra, Manager Verification Strategies
Joining as a Hardware Engineer in 2001 Abhijeet quickly rose to become a
Technical lead, Project Manager, and Manager Verification Strategies,
from March 2009.
His technical abilities are deep in every aspect of the design cycle,
including System Architecture, Specification development, Logic design,
RTL coding, Synthesis, Verification, Static timing analysis, FPGA
Prototype for design validation in a wide area of domain expertise
including Processor Architecture, cache coherence, Networking, USB2, PCI
and PCI Express (PCIE).
A stickler for perfection, no code is left unchecked under his hawkish eye.
Abhijeet holds an ME (Electronics & Tele-Communications) from
University of Pune (1995).
Prabha Krishnaswami, Manager ASIC Development
Joining Comit in 2003 as a Hardware Engineer, Prabha quickly rose to
become a Technical lead and Manager, ASIC Development from March 2009.
During her tenure she has developed and delivered a number of working
chips, with a keen eye for rigorous process in all areas of Asic design
and verification, Integration and verification of external IPs, FPGA
prototyping for design validation and Test vector generation and support.
Prabha holds an MS (VLSI) from Mississippi State University (1998) and a
BSEE, UVCE (1991) Bangalore, India.
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